Changed orange-fork

orangefork/orangefork.go

@@ -3,12 +3,12 @@ package orangefork
 import (
 	"errors"
 	"fmt"
+	"periph.io/x/conn/v3/pin/pinreg"
 	"strings"
 
 	"periph.io/x/conn/v3/driver/driverreg"
 	"periph.io/x/conn/v3/gpio"
 	"periph.io/x/conn/v3/pin"
-	"periph.io/x/conn/v3/pin/pinreg"
 	"periph.io/x/host/v3/allwinner"
 	"periph.io/x/host/v3/distro"
 )
@@ -71,7 +71,7 @@ var (
 	FUN1_13 pin.Pin = allwinner.PL11     // IR-RX
 
 	PC1_5  gpio.PinIO = allwinner.PC5
-	PC1_6  gpio.PinIO = allwinner.PC5
+	PC1_6  gpio.PinIO = allwinner.PC6
 	PC1_15 gpio.PinIO = allwinner.PC15
 	PC1_16 gpio.PinIO = allwinner.PC16
 )
@@ -91,23 +91,23 @@ func registerHeaders(model string) error {
 	if isOrangePiZeroModel(model) {
 		fmt.Println("It is an orange pi zero!")
 		// 26pin expansion port
-		if err := pinreg.Register("PA", [][]pin.Pin{
-			{PA1_1, PA1_2},
-			{PA1_3, PA1_4},
-			{PA1_5, PA1_6},
-			{PA1_7, PA1_8},
-			{PA1_9, PA1_10},
-			{PA1_11, PA1_12},
-			{PA1_13, PA1_14},
-			{PA1_15, PA1_16},
-			{PA1_17, PA1_18},
-			{PA1_19, PA1_20},
-			{PA1_21, PA1_22},
-			{PA1_23, PA1_24},
-			{PA1_25, PA1_26},
-		}); err != nil {
-			return err
-		}
+		//if err := pinreg.Register("PA", [][]pin.Pin{
+		//	{PA1_1, PA1_2},
+		//	{PA1_3, PA1_4},
+		//	{PA1_5, PA1_6},
+		//	{PA1_7, PA1_8},
+		//	{PA1_9, PA1_10},
+		//	{PA1_11, PA1_12},
+		//	{PA1_13, PA1_14},
+		//	{PA1_15, PA1_16},
+		//	{PA1_17, PA1_18},
+		//	{PA1_19, PA1_20},
+		//	{PA1_21, PA1_22},
+		//	{PA1_23, PA1_24},
+		//	{PA1_25, PA1_26},
+		//}); err != nil {
+		//	return err
+		//}
 
 		if err := pinreg.Register("PC", [][]pin.Pin{
 			{PC1_5, PC1_6},
@@ -119,23 +119,23 @@ func registerHeaders(model string) error {
 		}
 
 		// 13pin function interface
-		if err := pinreg.Register("FUN", [][]pin.Pin{
-			{FUN1_1},
-			{FUN1_2},
-			{FUN1_3},
-			{FUN1_4},
-			{FUN1_5},
-			{FUN1_6},
-			{FUN1_7},
-			{FUN1_8},
-			{FUN1_9},
-			{FUN1_10},
-			{FUN1_11},
-			{FUN1_12},
-			{FUN1_13},
-		}); err != nil {
-			return err
-		}
+		//if err := pinreg.Register("FUN", [][]pin.Pin{
+		//	{FUN1_1},
+		//	{FUN1_2},
+		//	{FUN1_3},
+		//	{FUN1_4},
+		//	{FUN1_5},
+		//	{FUN1_6},
+		//	{FUN1_7},
+		//	{FUN1_8},
+		//	{FUN1_9},
+		//	{FUN1_10},
+		//	{FUN1_11},
+		//	{FUN1_12},
+		//	{FUN1_13},
+		//}); err != nil {
+		//	return err
+		//}
 	} else {
 		fmt.Println("Sad panda")
 	}

vendor/periph.io/x/host/v3/allwinner/h6.go

@@ -0,0 +1,71 @@
+// Copyright 2022 The Periph Authors. All rights reserved.
+// Use of this source code is governed under the Apache License, Version 2.0
+// that can be found in the LICENSE file.
+
+// This file contains pin mapping information that is specific to the Allwinner
+// H5 model.
+
+package allwinner
+
+import (
+	"fmt"
+	"strings"
+
+	"periph.io/x/conn/v3/pin"
+	"periph.io/x/host/v3/sysfs"
+)
+
+// mappingH6 describes the mapping of the H5 processor gpios to their
+// alternate functions.
+//
+// It omits the in & out functions which are available on all gpio.
+//
+// The mapping comes from the datasheet page 26:
+// https://linux-sunxi.org/images/3/30/H616_Datasheet_V1.0.pdf
+//
+//   - The datasheet uses TWI instead of I2C but it is renamed here for
+//     consistency.
+//   - RGMII means Reduced gigabit media-independent interface.
+//   - SDC means SDCard?
+//   - NAND connects to a NAND flash controller.
+//   - CSI and CCI are for video capture.
+var mappingH6 = map[string][5]pin.Func{
+	"PC0": {"NAND_WE", "SDC2_DS", "SPI0_CLK", "", "PA_EINT0"},
+	"PC1": {"NAND_ALE", "SDC2_RST", "", "", "PA_EINT1"},
+	"PC2": {"NAND_CLE", "", "SPI0_MOSI", "", "PA_EINT2"},
+	"PC3": {"NAND_CE1", "", "SPI0_CS0", "BOOT_SEL1", "PA_EINT3"},
+	"PC4": {"NAND_CE0", "", "SPI0_MIS0", "BOOT_SEL2", "PA_EINT4"},
+	"PC5": {"NAND_RE", "SDC2_CLK", "", "BOOT_SEL3", "PA_EINT5"},
+	"PC6": {"NAND_RB0", "SDC2_CMD", "", "BOOT_SEL4", "PA_EINT6"},
+	"PC7": {"NAND_RB1", "", "SPI0_CS1", "", "PA_EINT7"},
+	"PC8": {"NAND_DQ7", "SDC2_D3", "", "", "PA_EINT8"},
+
+	"PC9":  {"NAND_DQ6", "SDC2_D4", "", "", "PA_EINT9"},
+	"PC10": {"NAND_DQ5", "SDC2_D0", "", "", "PA_EINT10"},
+	"PC11": {"NAND_DQ4", "SDC2_D5", "", "", "PA_EINT11"},
+	"PC12": {"NAND_DQS", "", "", "", "PA_EINT12"},
+	"PC13": {"NAND_DQ3", "SDC2_D1", "", "", "PA_EINT13"},
+	"PC14": {"NAND_DQ2", "SDC2_D6", "", "", "PA_EINT14"},
+	"PC15": {"NAND_DQ1", "SDC2_D1", "SPI0_WP", "", "PA_EINT15"},
+	"PC16": {"NAND_DQ0", "SDC2_D7", "SPI0_HOLD", "", "PA_EINT16"},
+}
+
+// mapH6Pins uses mappingH6 to actually set the altFunc fields of all gpio
+// and mark them as available.
+//
+// It is called by the generic allwinner processor code if an H6 is detected.
+func mapH6Pins() error {
+	fmt.Println("Initializing H6 pins.")
+	for name, altFuncs := range mappingH6 {
+		pin := cpupins[name]
+		pin.altFunc = altFuncs
+		pin.available = true
+		if strings.Contains(string(altFuncs[4]), "_EINT") {
+			pin.supportEdge = true
+		}
+
+		// Initializes the sysfs corresponding pin right away.
+		pin.sysfsPin = sysfs.Pins[pin.Number()]
+	}
+	return nil
+}